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dc.contributor.authorPriya, Anjali
dc.contributor.authorSrivastava, Nilesh Anand
dc.contributor.authorMishra, Ram Awadh
dc.date.accessioned2018-11-07T08:21:41Z
dc.date.available2018-11-07T08:21:41Z
dc.date.issued2018
dc.identifier.citationAdvances in electrical and electronic engineering. 2018, vol. 16, no. 3, p. 380-386 : ill.cs
dc.identifier.issn1336-1376
dc.identifier.issn1804-3119
dc.identifier.urihttp://hdl.handle.net/10084/132829
dc.description.abstractRecently, Fully-Depleted Silicon on Insulator (FD-SOI) MOSFETs have been accepted as a favourable technology beyond nanometer nodes, and the technique of Recessed-Source/Drain (Re-S/D) has made it more immune in regards of various performance factors. However, the proper selection of Buried-Oxide (BOX) thickness is one of the major challenges in the design of FD-SOI based MOS devices in order to suppress the drain electric penetrations across the BOX interface efficiently. In this work, the effect of BOX thickness on the performance of TMG Re-S/D FD-SOI MOSFET has been presented at 60 nm gate length. The perspective of BOX thickness variation has been analysed on the basis of its surface potential profile and the extraction of the threshold voltage by performing two-dimensional numerical simulations. Moreover, to verify the short channel immunity, the impact of gate length scaling has also been discussed. It is found that the device attains two step-up potential profile with suppressed short channel effects. The outcomes reveal that the Drain Induced Barrier Lowering (DIBL) values are lower among conventional SOI MOSFETs. The device has been designed and simulated by using 2D numerical ATLAS Silvaco TCAD simulator.cs
dc.format.extent580420 bytes
dc.format.mimetypeapplication/pdf
dc.language.isoencs
dc.publisherVysoká škola báňská - Technická univerzita Ostravacs
dc.relation.ispartofseriesAdvances in electrical and electronic engineeringcs
dc.relation.urihttp://dx.doi.org/10.15598/aeee.v16i3.2797cs
dc.rights© Vysoká škola báňská - Technická univerzita Ostrava
dc.rightsAttribution-NoDerivatives 4.0 International*
dc.rights.urihttp://creativecommons.org/licenses/by-nd/4.0/*
dc.subjectburied oxidecs
dc.subjectFD-SOIcs
dc.subjectRe-S/Dcs
dc.subjectshort channel effectscs
dc.titlePerspective of buried oxide thickness variation on triple metal-gate (TMG) recessed-S/D FD-SOI MOSFETcs
dc.typearticlecs
dc.identifier.doi10.15598/aeee.v16i3.2797
dc.rights.accessopenAccesscs
dc.type.versionpublishedVersioncs
dc.type.statusPeer-reviewedcs


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