| dc.contributor.author |
Fröschle, Sibylle |
|
| dc.contributor.author |
Jančar, Petr |
|
| dc.contributor.author |
Lasota, Slawomir |
|
| dc.contributor.author |
Sawa, Zdeněk |
|
| dc.date.accessioned |
2009-12-07T12:33:52Z |
|
| dc.date.available |
2009-12-07T12:33:52Z |
|
| dc.date.issued |
2010 |
|
| dc.identifier.citation |
Information and computation. 2010, vol. 208, issue 1, p. 42-62. |
en |
| dc.identifier.issn |
0890-5401 |
|
| dc.identifier.uri |
http://hdl.handle.net/10084/77202 |
|
| dc.description.abstract |
We show polynomial time algorithms for deciding hereditary history preserving bisimilarity (in O(n3logn)) and history preserving bisimilarity (in O(n6)) on the class Basic Parallel Processes. The latter algorithm also decides a number of other non-interleaving behavioural equivalences (e.g., distributed bisimilarity) which are known to coincide with history preserving bisimilarity on this class. The common general scheme of both algorithms is based on a fixpoint characterization of the equivalences for tree-like labelled event structures. The technique for realizing the greatest fixpoint computation in the case of hereditary history preserving bisimilarity is based on the revealed tight relationship between equivalent tree-like labelled event structures. In the case of history preserving bisimilarity, a technique of deciding classical bisimilarity on acyclic Petri nets is used. |
en |
| dc.language.iso |
en |
en |
| dc.publisher |
Elsevier |
en |
| dc.relation.ispartofseries |
Information and computation |
en |
| dc.relation.uri |
http://dx.doi.org/10.1016/j.ic.2009.06.001 |
en |
| dc.subject |
verification |
en |
| dc.subject |
equivalence checking |
en |
| dc.subject |
non-interleaving equivalences |
en |
| dc.subject |
labelled event structures |
en |
| dc.subject |
hereditary history preserving bisimilarity |
en |
| dc.subject |
history preserving bisimilarity |
en |
| dc.subject |
bisimulation equivalence |
en |
| dc.subject |
basic parallel processes |
en |
| dc.title |
Non-interleaving bisimulation equivalences on Basic Parallel Processes |
en |
| dc.type |
Article |
en |
| dc.identifier.location |
Není ve fondu ÚK |
en |
| dc.identifier.doi |
10.1016/j.ic.2009.06.001 |
|
| dc.identifier.wos |
000272035700003 |
|