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Transition based synthesis with modular encoding of Petri nets into FPGAs 

Bukowiec, Arkadiusz; Tkacz, Jacek; Adamski, Marian (Advances in electrical and electronic engineering. 2014, vol. 12, no. 5, p. 435-442 : ill.)

On ladder diagrams compilation and synthesis to FPGA implemented reconfigurable logic controller 

Milik, Adam (Advances in electrical and electronic engineering. 2014, vol. 12, no. 5, p. 443-451 : ill.)

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AuthorAdamski, Marian (1)Bukowiec, Arkadiusz (1)Milik, Adam (1)Tkacz, Jacek (1)Date Issued2014 (2)SubjectFPGA (2)
logic synthesis (2)
application specific logic controller (1)DFG (1)high-level synthesis (1)IEC61131-3 (1)LD (1)Petri net (1)PLC (1)reconfigurable hardware (1)... View MoreTypearticle (2)Source TitleAdvances in electrical and electronic engineering (2)xmlui.ArtifactBrowser.AdvancedSearch.type_publisherVysoká škola báňská - Technická univerzita Ostrava (2)Rights AccessopenAccess (2)

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