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dc.contributor.authorEzhilarasan, G.
dc.contributor.authorMohanraj, K.
dc.contributor.authorVishnuram, Pradeep
dc.contributor.authorBajaj, Mohit
dc.contributor.authorBlažek, Vojtěch
dc.contributor.authorProkop, Lukáš
dc.contributor.authorMišák, Stanislav
dc.date.accessioned2024-04-30T07:51:01Z
dc.date.available2024-04-30T07:51:01Z
dc.date.issued2023
dc.identifier.citationAlexandria Engineering Journal. 2023, vol. 83, p. 148-194.cs
dc.identifier.issn1110-0168
dc.identifier.issn2090-2670
dc.identifier.urihttp://hdl.handle.net/10084/152589
dc.description.abstractThe majority of high-power, high-voltage, and high-power medium-voltage electronic applications now need multi-level inverters (MLIs), which are becoming a required technology. MLIs may provide a wide range of output levels designed to meet the diverse requirements of high voltage/power applications. In addition to the increased output levels, MLI can mitigate the total harmonic distortion (THD) and perform the function of voltage stress (dv/dt) reduction across the power switches. The overwhelming development of new MLI topologies on existing ones multiplies its potential to stimulate more output levels with fewer components. Moreover, the most recent MLI topologies use symmetrical dc sources to produce comparable output levels with fewer semiconductor switches, decreasing capital costs and improving system reliability. In essence, asymmetrical DC source values can be obtained from various unconventional energy sources, including solar, wind, etc. As a result, the various topologies were proposed with an asymmetrical structure for balancing the unequal DC voltage sources and converting them into AC voltages with balanced conditions. This comprehensive review will provide an in-depth analysis of various MLI setups based on switch count, switching methods, symmetric structures, asymmetric topologies, and hybrid configurations.cs
dc.language.isoencs
dc.publisherElseviercs
dc.relation.ispartofseriesAlexandria Engineering Journalcs
dc.relation.urihttps://doi.org/10.1016/j.aej.2023.10.049cs
dc.rights© 2023 THE AUTHORS. Published by Elsevier BV on behalf of Faculty of Engineering, Alexandria University.cs
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/cs
dc.subjectasymmetric MLIcs
dc.subjecthybrid MLIcs
dc.subjectmultilevel inverterscs
dc.subjectsymmetric MLIcs
dc.titleAn empirical survey of topologies, evolution, and current developments in multilevel inverterscs
dc.typearticlecs
dc.identifier.doi10.1016/j.aej.2023.10.049
dc.rights.accessopenAccesscs
dc.type.versionpublishedVersioncs
dc.type.statusPeer-reviewedcs
dc.description.sourceWeb of Sciencecs
dc.description.volume83cs
dc.description.lastpage194cs
dc.description.firstpage148cs
dc.identifier.wos001102313700001


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© 2023 THE AUTHORS. Published by Elsevier BV on behalf of Faculty of Engineering, Alexandria University.
Except where otherwise noted, this item's license is described as © 2023 THE AUTHORS. Published by Elsevier BV on behalf of Faculty of Engineering, Alexandria University.