Simulátor stroje RAM
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Vysoká škola báňská – Technická univerzita Ostrava
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Abstract
The subject of this thesis is designing a simulator of a theoretical machine called RAM (Random Access Machine).
RAM is a theoretical model that imitates the processor of a computer. It is used for testing algorithmic complexity and analysis of algorithms. There are a lot
of different kinds of RAMs mostly differing by their instruction sets. Existing
applications for simulating RAMs usually support only one instruction set.
The main goal of this thesis is the implementation of a RAM simulator application that can support
any instruction set defined by the user. The application is a SPA (Single Page App)
that runs entirely in the browser. User-defined programs and instruction sets
are stored in the local storage of the browser.
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RAM, Blazor, Blazor WebAssembly, .NET, JavaScript, C#, Bootstrap