Měření s tříosým akcelerometrem prostředky programovatelné logiky

Abstract

The aim of this bachelor thesis is to realize a demonstration task which represents the measurement with three-axis accelerometer ADXL362 by means of programmable logic FPGA from the Xilinx Digilent family. A field programmable gate array is placed on the development board Nexys 3 from Digilent, and PmodACL2 is used for measuring acceleration which is connected to the Nexys 3 board via the Pmod connector. The design of FPGA communicates with the accelerometer through SPI interface. The whole design was written in VHDL language and implemented in the ISE Design Suite developing tool. This bachelor thesis includes an overview of the accelerometer technology, their principles, and constructions.