From UML specification into FPGA implementation

Abstract

In the paper a method of using the Unified Modeling Language for specification of digital systems, especially logic controllers, is presented. The proposed method is based mainly on the UML state machine diagrams and uses Hierarchical Concurrent Finite State Machines (HCFSMs) as a temporary model. The paper shows a way to transform the UML diagrams, expressed in XML language, to the form that is acceptable by reconfigurable FPGAs (Field Programmable Gate Arrays). The UML specification is used to generate an effective program in Hardware Description Languages (HDLs), especially Verilog.