Microstructure related issues of electroplated copper interconnects in microelectronics
| dc.contributor.author | Freundlich, P. | en |
| dc.date.accessioned | 2006-04-19T21:01:35Z | |
| dc.date.available | 2006-04-19T21:01:35Z | |
| dc.date.issued | 2005 | en |
| dc.description.abstract | In modern microelectronics, material related issues emerge as new technologies are introduced. The powerful experimental and theoretical tools of materials engineering are often capable of proper characterization and description of the problems in question. This paper deals with characterization and modeling of self-annealing in electroplated copper thin films which are used since late 90's as interconnects in state-of-the-art integrated circuits. Specifics of the experimental methods suitable for studying thin copper films are discussed. Based on the experimental results, new model is developed which describes the self-annealing by means of abnormal grain growth. The predictive capabilities of the model are verofied on previously obtained experimental data. | |
| dc.format.extent | 976801 bytes | cs |
| dc.format.mimetype | application/pdf | cs |
| dc.identifier.citation | Sborník vědeckých prací Vysoké školy báňské - Technické univerzity Ostrava. Řada hutnická. 2005, roč. 48, č. 1, s. 73-79 : il. | en |
| dc.identifier.issn | 0474-8484 | en |
| dc.identifier.uri | http://hdl.handle.net/10084/32640 | |
| dc.language.iso | en | en |
| dc.publisher | Vysoká škola báňská - Technická univerzita Ostrava | en |
| dc.relation.ispartofseries | Sborník vědeckých prací Vysoké školy báňské - Technické univerzity Ostrava. Řada hutnická | en |
| dc.rights | © Vysoká škola báňská-Technická Univerzita Ostrava | cs |
| dc.rights.access | restrictedAccess | |
| dc.title | Microstructure related issues of electroplated copper interconnects in microelectronics | en |
| dc.type | article | en |
| dc.type.status | Peer-reviewed | cs |
| dc.type.version | publishedVersion | cs |