Microstructure related issues of electroplated copper interconnects in microelectronics

dc.contributor.authorFreundlich, P.en
dc.date.accessioned2006-04-19T21:01:35Z
dc.date.available2006-04-19T21:01:35Z
dc.date.issued2005en
dc.description.abstractIn modern microelectronics, material related issues emerge as new technologies are introduced. The powerful experimental and theoretical tools of materials engineering are often capable of proper characterization and description of the problems in question. This paper deals with characterization and modeling of self-annealing in electroplated copper thin films which are used since late 90's as interconnects in state-of-the-art integrated circuits. Specifics of the experimental methods suitable for studying thin copper films are discussed. Based on the experimental results, new model is developed which describes the self-annealing by means of abnormal grain growth. The predictive capabilities of the model are verofied on previously obtained experimental data.
dc.format.extent976801 bytescs
dc.format.mimetypeapplication/pdfcs
dc.identifier.citationSborník vědeckých prací Vysoké školy báňské - Technické univerzity Ostrava. Řada hutnická. 2005, roč. 48, č. 1, s. 73-79 : il.en
dc.identifier.issn0474-8484en
dc.identifier.urihttp://hdl.handle.net/10084/32640
dc.language.isoenen
dc.publisherVysoká škola báňská - Technická univerzita Ostravaen
dc.relation.ispartofseriesSborník vědeckých prací Vysoké školy báňské - Technické univerzity Ostrava. Řada hutnickáen
dc.rights© Vysoká škola báňská-Technická Univerzita Ostravacs
dc.rights.accessrestrictedAccess
dc.titleMicrostructure related issues of electroplated copper interconnects in microelectronicsen
dc.typearticleen
dc.type.statusPeer-reviewedcs
dc.type.versionpublishedVersioncs

Files