Analysis Of Harmonic Mitigation Techniques For Cascaded Asymmetric Inverters

Abstract

Multilevel inverters (MLIs) are attracting the attention of academics as well as industry as a fea- sible technology for an extensive variety of purposes, like renewable energy sources, and Electric vehicles. MLIs are commonly employed as a part of the sophisti- cated converter configurations in both high and medium voltage applications. The creation of minimised switch MLI structures remains a key objective of the present research with the goal to achieve superior results de- spite of involved a greater number of switches. Ba- sically, various layouts of asymmetrical configuration using enhanced cascaded bridge topologies are identified in a brief overview and evaluated against important pa- rameters. It is a method of designing multiple voltage levels using identical switch count and fewer devices. This work describes numerous varieties of harmonic mitigation techniques, and it also outlines the most ef- fective switching angle optimizations to produce various levels. Furthermore, the effectiveness of configuration is evaluated based on minimising THD due to decreas- ing lower order harmonics. THD is evaluated against various mitigation techniques employing certain pro- portions of source voltages coming from solar energy /batteries. THD is calculated theoretically and con- trasted to simulation outcomes for the suggested con- figurations. The simulated waveforms of various con- figurations are examined using Hardware in loop (HIL) application.