AEEE. 2021, vol. 19

Permanent URI for this collectionhttp://hdl.handle.net/10084/143045

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Now showing 1 - 20 out of 36 results

Electron Optical Optimisation of an Imaging Energy Analyser: Real Model Field- and Trajectory Simulations Applied to k-Space Visualisation of Electronic States
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Ceballos, Gabriel Armando; Grzelakowski, Krzysztof Piotr
In this report we present a new numerical approach and complex analysis of electron beam propagation based on a realistic model of an optimised imaging spherical deflector analyser. Electron beam trajectory simulations, carried out for real experimental boundaries, enabled us to reveal and explain the unique optical properties which were employed in the instrumental optimisation followed by empirical, spectromicroscopic applications. In terms of numerical treatment, it was possible to verify the low-aberration imaging in reciprocal and real spaces at π and 2π, respectively, and the advantage of energy-selective visualisation of the k-space. Furthermore, this unique feature has been proven and confirmed experimentally by implementing the HeI/HeII monochromatic photon source into our improved spectromicroscopic system and by the energy-selective visualisation of an electronic state projection in the reciprocal plane. A clear correlation between a numerically simulated electronic projection and an experimentally-obtained k-space imaging has been demonstrated.
Development of a Device for On-Die Double-Pulse Testing and Measurement of Dynamic On-Resistance of GaN HEMTs
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Kozárik, Jozef; Marek, Juraj; Chvala, Aleš; Minárik, Michal; Gasparek, Krisztian; Jagelka, Martin
On-die testing can accelerate development of semiconductor devices, but poses certain challenges related to high frequency and high current switching. This paper describes design and development of a tester for double-pulse switching test and measurement of dynamic on-state resistance of unpackaged High-Electron-Mobility Transistors (GaN HEMTs). The tester is capable of switching an inductive load at drain-to-source voltage up to 400 V and drain current up to 10 A. Design challenges resulting from specific properties of GaN HEMTs and on-die measurement are explained, and solutions are proposed. Essential parts of the developed device are described, including low inductance gate-driver and measurement methods. Modified drain voltage clamping circuit for accurate on-state drain voltage measurement is described. The tester is constructed as a printed circuit board, integrated into a probe station. Voltage and current waveforms are measured with oscilloscope and used to calculate the on-resistance. Results of a reference measurement with commercially available packaged transistors are presented. Waveforms measured on experimental unpackaged normally-off GaN HEMT samples are also presented and discussed. The proposed tester device proved to be capable of performing the dynamic on-resistance measurement with satisfactory results.
Study of Scandium Based Ohmic Contacts to AlGaN/GaN Heterostructures
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Ilgiewicz, Grzegorz; Macherzynski, Wojciech; Prazmowska-Czajka, Joanna; Stafiniak, Andrzej; Paszkiewicz, Regina
Development of semiconductor devices based on AlGaN/GaN heterostructure requires study and improvement of ohmic contacts, whose necessary improvement lies in process of checking new metallic compositions and thermal formation process parameters. Usually, in metallic ohmic annealed contacts of AlGaN/GaN heterostructures, titanium is applied as the first layer, but scandium may be an alternative. It was proved to be useful to obtain both ohmic and Schottky characteristics, depending on annealing temperature of the contact. In the presented research, contacts including scandium (Sc/Al/Mo/Au) were fabricated, and, as reference sample, contacts with titanium including metallziation (Ti/Al/Mo/Au). Reference sample was annealed at 825°C, and forming temperatures for scandium contacts were 825°C, 625°C, and 425°C. All samples after thermal formation process were additionally thickened with Ru/Au bilayer. To quickly compare level of metals in metallization mixing during formation process and to check applicability of EDS (Energy-Dispersive X-ray Spectroscopy), the simulations of electrons trajectories and EDS point scans were performed.
Concept of the InGaAs Plasmonic Waveguide for Quantum Cascade Laser Applications
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Lozinska, Adriana; Badura, Mikolaj; Sciana, Beata
Quantum cascade lasers are sophisticated devices mostly based on InGaAs/AlInAs/InP heterostructures to improve thermal performance. Their structure consists of a core containing hundreds or even thousands of thin layers, covered on both sides with thick cladding waveguides. Such a laser design creates enormous stresses in the core and can cause degradation of the entire device. An alternative to the thick InP claddings are thin, highly doped InGaAs layers used as plasmonic waveguides. This solution allows to achieve a mode confinement above 50% even at only 150 nm of the waveguide layer, which is extremely difficult in the case of standard designs. The article presents theoretical simulations concerning the influence of the InGaAs plasmonic layer on the mode confinement.
Reducing the Source Resistance by Increasing the Gate Effect on Substrate for Future Terahertz HEMT Device
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Derrouiche, Soufiane
In this paper, we present the dependence of source resistance sensibility on the gate bias effect in a High Electron Mobility Transistor (HEMT) using the Drift-Diffus (D-D) model with the SILVACO Technology Computer-Aided Design (TCAD) tool. The obtained results show that the increases of gate bias effect on substrate lead to decreasing the source resistance of the simulated device. The reported increase in the effect of gate induces the increases of transferred holes concentration towards the source region and which induce the decreases of source resistance. The decrease of source resistance can also be made by reducing the buffer thickness which leads to an increase in the gate effect on the substrate. The source resistance value is influenced by the Drain-Induced Barrier Lowering (DIBL) effect where the rate of decreasing the source resistance will be decreasing consequently to increase the drain bias. The reduction of the source resistance induces the increase of device sensibility for lows values of current.
Analysis of Optical Single Sideband Modulators for Radio Over Fiber Link with and without Second Order Sidebands
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Goel, Pooja; Kaushik, Rahul
The analysis of Optical Single Sideband (OSSB) generation with and without second-order sidebands for Radio over Fiber (RoF) is presented. The performance of systems based on hybrid coupler with distinct phase angle and Dual-Parallel Dual-Drive Mach-Zehnder Modulator (DP-DDMZM) is compared using simulation. Impact of parameters like Single-Mode Fiber (SMF) length, Radiofrequency (RF) amplitude, and laser linewidth on Signal-to-Noise Ratio (SNR) has been investigated. It has been observed that eliminating one of the second-order sidebands with 120° hybrid coupler improves peak SNR in comparison to 90° hybrid coupler with both second-order sidebands and DP-DDMZM-based system without second-order sidebands irrespective of Continuous Wave (CW) laser linewidth.
Area and Energy Opimized QCA Based Shuffle-Exchange Network with Multicast and Broadcast Configuration
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Premananda, Belegehalli Siddaiah; Manalogoli, Samana Hanumanth; Nikhil, Kiran Jayanthi
In any wide-range processing system, rapid interconnecting networks are employed between the processing modules and embedded systems. This study deals with the optimized design and implementation of Switching Element (SE) which operates in four modes, accepting two inputs and delivering two outputs. The Shuffle-Exchange Network (SEN) can be used as a single-stage as well as a multi-stage network. SEN is used as an interconnection architecture which is implemented with exclusive input-output paths with simple design. The SE acts as a building block to the Multi-stage Shuffle-Exchange Network (M-SEN) with facilities to perform unicast and multicast operation on the inputs. An 8x8 M-SEN model is also implemented, which works in three modes of communication, termed as "One-to-One", "One-to-Many" and "One-to-All" M-SEN configuration. All the QCA circuits have been implemented and simulated using CAD tool QCADesigner. The proposed QCA-based M-SEN design is better in terms of area occupied by 14.63%, average energy dissipation by 22.75% and cell count with a reduction of 84 cells when compared to reference M-SEN architecture. The optimization of the design in terms of cell count and area results in lesser energy dissipation and hence can be used in future-generation complex networks and communication systems.
Exploiting Performance of Ambient Backscatter Systems in Presence of Hardware Impairment
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Nguyen, Minh Sang Van; Dang, Huu Phuc
In the context of ambient Backscatter systems, Backscatter devices (tags and readers) transmit data by employing existing Radio Frequency (RF) signals. Most prior works consider perfect hardware impairment and apply the Orthogonal Multiple Access (OMA) technique, but this paper investigates the case of Outage Probability (OP) reduction situation when the hardware is imperfect, especially when the Non-Orthogonal Multiple Access (NOMA) technology is applied. Consequently, we design a downlink of transmission from base station to destination to highlight different performances among users. Furthermore, to indicate the impact of levels of hardware impairment, we develop the closed-form expressions of OP for different kinds of users. Finally, extensive simulation results validate the analysis and illustrate the effectiveness of the proposed system.
A Benchmark of Non-intrusive Parametric Audio Quality Estimation Models for Broadcasting Systems and Web-casting Applications
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Jakubík, Martin; Počta, Peter
Due to the rising usage of various broadcasting systems and web-casting applications, a measurement of audio quality has become an essential task. This paper presents a benchmark of the parametric models for non-intrusive estimation of the audio quality perceived by the end user. The proposed solution is based on machine learning techniques for broadcasting systems and web-casting applications. The main goal of this study is to assess the performance of the non-intrusive parametric models as well as to evaluate a statistical significance of the performance differences between those models. The paper provides a comparison of several models based on the Support Vector Regression, Genetic Programming, Multigene Symbolic Regression, Neural Networks and Random Forest. The obtained results indicate that among the investigated models the most accurate, although not the fastest ones, are the model based on Random Forest (a broadcast scenario) and the SVR-based model (a web-cast scenario). These models represent promising candidates for non-intrusive parametric audio quality assessment in the context of broadcasting systems and web-casting applications.
Optimized Gains for the Control of Islanded Solar Photovoltaic and Wind System
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Kedari, Sravya; Veramalla, Rajagopal; Kodakkal, Amritha
This paper deals with a system that consists of a combination of wind and solar sources. The wind energy unit is the primary energy source that feeds the load and is controlled by the I cos Phi algorithm. The algorithm’s efficiency is tested under normal operation and when one of the phases in the load is disconnected. This algorithm efficiently maintains the voltage and frequency during these conditions. The solar unit is directly connected with the battery energy storage system and is used to charge the battery. It implements MPPT using Perturb and Observe (P&O) method. The hybrid system is simulated in MATLAB/SIMULINK. It is found to perform and maintain the frequency and the potential at the load side and the point of common coupling under normal operation and varying load conditions. I cos Phi algorithm, which controls the switching signals, requires simple calculations for generating reference source currents. This algorithm does not need conversion from one frame to another, making the system respond for quick dynamics and improved power quality. The perturb and observe method is proven to ensure the maximum power extraction from the solar panel. Thus, the combination of these two techniques makes the system act efficiently and handle load disturbances.
Intelligent Bearing Fault Diagnosis Method Based on HNR Envelope and Classification Using Supervised Machine Learning Algorithms
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Ouachtouk, Ilias; El Hani, Soumia; Dahi, Khalid
Research on data-driven bearing fault diagnosis techniques has recently drawn more and more attention due to the availability of massive condition monitoring data. The research work presented in this paper aims to develop an architecture for the detection and diagnosis of bearing faults in the induction machines. The developed data-oriented architecture uses vibration signals collected by sensors placed on the machine, which is based, in the first place, on the extraction of fault indicators based on the harmonics-to-noise ratio envelope. Normalisation is then applied to the extracted indicators to create a well-processed data set. The evolution of these indicators will be studied afterwards according to the type and severity of defects using sequential backward selection technique. Supervised machine learning classification methods are developed to classify the measurements described by the feature vector with respect to the known modes of operation. In the last phase concerning decision making, ten classifiers are tested and applied based on the selected and combined indicators. The developed classification methods allow classifying the observations, with respect to the different modes of bearing condition (outer race, inner race fault or healthy condition). The proposed method is validated on data collected using an experimental bearing test bench. The experimental results indicate that the proposed architecture achieves high accuracy in bearing fault detection under all operational conditions. The results show that, compared to some proposed approaches, our proposed architecture can achieve better performance overall in terms of the number of optimal features and the accuracy of the tests.
Booth-Encoded Karatsuba: A Novel Hardware-Efficient Multiplier
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Jain, Riya; Pahwa, Khushbu; Pandey, Neeta
There is a recent boom being witnessed in emerging areas like IoMT (Internet of Medical Things), Artificial Intelligence for healthcare, and disaster management. These novel research frontiers are critical in terms of hardware and cannot afford to compromise accuracy or reliability. Multiplier, being one of the most heavily used components, becomes crucial in these applications. If optimized, multipliers can impact the overall performance of the system. Thus, in this paper, an attempt has been made to determine the potential of accurate multipliers while meeting minimal hardware requirements. In this paper, we propose a novel Booth-Encoded Karatsuba multiplier and provide its comparison with a Booth-Encoded Wallace tree multiplier. These architectures have been developed using two types of Booth encoding: Radix-4 and Radix-8 for 16-bit, 32-bit and 64-bit multiplications. The algorithm is designed to be parameterizable to different bit widths, thereby offering higher flexibility. The proposed mul- tiplier offers advantage of enhanced performance with significant reduction in hardware while negligibly trad- ing off the Power Delay Product (PDP). It has been observed that the performance of the proposed architecture increases with increasing multiplier size due to significant reduction in hardware and slight increase in PDP. All the architectures have been implemented in Verilog HDL using Xilinx Vivado Design Suite.
An Explicit Output Current-mode Quadrature Sinusoidal Oscillator and a Universal Filter Employing Only Grounded Passive Components - a Minimal Realisation
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Arora, Tajinder Singh; Gupta, Manish; Gupta, Shiv Narain
The use of voltage differencing current conveyor as an active device to design a current-mode oscillator along with a universal filter with only grounded passive elements is the main focus of this manuscript. This re-arranging circuit can work as a sinusoidal oscillator as well as a current-mode universal filter, by simple selection of passive switches. Both the circuits employ only two active devices and three grounded passive elements. The designed oscillator provides two distinctive current outputs with a quadrature-phase difference. It also maintains an independent condition of oscillation and frequency of oscillation. Moreover, the basic responses including low pass, high pass, and band pass are easily available from a current-mode universal filter. The low input impedance and high output impedance are amongst the noteworthy features of the current-mode derived filter. Non-ideal, parasitic, and sensitivity analysis of the designed circuits are also incorporated in the manuscript. Cadence PSPICE software simulation results are also included to justify the design idea. Experimental implementation of the described circuit has also been shown by employing special-purpose amplifier integrated circuit, i.e., OPA860.
Design and Implementation of Parallel Bypass Bin Processing for CABAC Encoder
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Mamidi, Nagaraju; Gupta, Santosh Kumar; Bhadauria, Vijaya
The ever-increasing demand for high-quality digital video requires efficient compression techniques and fast video codecs. It necessitates increased complexity of the video codec algorithms. So, there is a need for hardware accelerators to implement such complex algorithms. The latest video compression algorithms such as High-Efficiency Video Coding (HEVC) and Versatile Video Coding (VVC) have been adopted Context-based Adaptive Binary Arithmetic Coding (CABAC) as the entropy coding method. The CABAC has two main data processing paths: regular and bypass bin path, which can achieve good compression when used with Syntax Elements (SEs) statistics. However, it is highly intrinsic data dependence and has sequential coding characteristics. Thus, it is challenging to parallelize. In this work, a 6-core bypass bin path having high-throughput and low hardware area has been proposed. It is a parallel architecture capable of processing up to 6 bypass bins per clock cycle to improve throughput. Further, the resource-sharing techniques within the binarization and a common controller block have reduced the hardware area. The proposed architecture has been simulated, synthesized, and prototyped on 28 nm Artix 7 Field Programmable Gate Array (FPGA). The implementation of Application Specific Integrated Circuit (ASIC) has been done using 65 nm CMOS technology. The proposed design achieved a throughput of 1.26 Gbin/s at 210 MHz operating frequency with a low hardware area compared to existing architectures. This architecture also supports multi-standard (HEVC/VVC) encoders for Ultra High Definition (UHD) applications.
Adjustable Gain Enhanced Fuzzy Logic Controller for Optimal Wheel Slip Ratio Tracking in Hard Braking Control System
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Eze, Paulinus Chinaenye; Ekengwu, Bonaventure Onyeka; Asiegbu, Nnaemeka Christopher; Ozue, ThankGod Izuchukwu
This paper has presented hard braking control system based on Adjustable Gain Enhanced Fuzzy Logic Controller (AGE-FLC) for optimal wheel slip ratio tracking performance. The purpose of the study was to improve slip ratio tracking and eliminate cycling while achieving very much shortened distance during emergency braking. The model of a braking vehicle at speed of 30 m.s^-1 subject to wheel locking was developed and implemented in MATLAB/Simulink environment. Simulation was conducted without a controller to study the slip ratio performance of the system on different road surfaces. The simulation results showed that stopping distance was 135.2 m in 5 seconds. A Fuzzy Logic Controller (FLC) whose control signal was enhanced by adding an adjustable gain mechanism to its output was designed. Simulation results showed that the AGE-FLC controller offered optimal tracking of desired wheel slip ratio of 0.1 as fast as possible on all road surface scenarios, while improving the stopping distance by 70.4% on dry road surface, 63.3% on wet road surface, 57.5% on cobblestone road surface and 48.8% on snow road surface in 2.651seconds.
Parameter Estimation of LFM Signal in Low Signal-to-Noise Ratio Using Cross-Correlation Function
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Duong, Van Minh; Veselý, Jiří; Hubáček, Petr; Janů, Přemysl; Phan, Nhat Giang
The pulse with intra-pulse modulation plays an important role in the design of radar systems. The first class of the signals type is the linear frequency modulation technique. The linear frequency modulation is used to resolve range resolution problems. This paper provides a new algorithm for detecting linear frequency modulation signals at a low signal-to-noise ratio. The core idea of the proposed method is firstly to analyse the linear frequency modulation signals via Fast Fourier Transform; and then to accumulate all energy to achieve signal detection using cross-correlation methods. The proposed algorithm showed better results in comparison with current algorithms, which are used to estimate the parameters of the linear frequency modulation signals at a low signal-to-noise ratio.
Exploiting NOMA in D2D Assisted Full-duplex Cooperative Relaying
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Thi Nguyen, Tu-Trinh; Do, Dinh-Thuan
In a wireless system, dual-hop transmission requires Full-Duplex (FD) to transmit signals from the base station too far users. It is more beneficial if we deploy non-orthogonal multiple access to serve specific users, i.e. normal users (near and far users) and device-to-device users. The fairness and outage performance of these users can be studied. We particularly focus on mathematical analysis of outage performance which is computed based on Signal to Noise Ratio (SNR) of received signals at each kind of user. We derive a closed-form formula of such outage probability along with throughput. To realize both the FD NOMA, this paper performs system performance metrics and considers how self-interference make influences system performance. The simulation results validate the theoretical analysis and show that our scheme can obtain a better outage probability and throughput performance with high transmit SNR at the base station and lower required target rates.
High Frequency Multipurpose SiC MOSFET Driver
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Strossa, Jan; Damec, Vladislav; Sobek, Martin; Kouřil, Daniel; Bača, Jakub
This article describes a new multipurpose Silicone-Carbide (SiC) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) driver, which was designed and manufactured for a high frequency operating SiC transistor as a semiconductor switching device of power converters. The design of the introduced driver enables to adjust the output voltage levels easily by choosing the integrated linear voltage stabilizers with suitable output parameters used for Printed Circuit Board (PCB) mounting. The voltage insulation of the proposed driver between the primary control side and the secondary output side is performed by MGJ6D12H24MC muRata Ps DC-DC converter with a declared dv/dt immunity 80 kV/1000 ms at 1.6 kV and by IX3180 IXYS High Speed gate driver optocouplers with a declared 10 kV/1000 ms minimum common mode rejection at 1.5 kV. The voltage insulation of these coupling elements is accompanied by safety gaps on the PCB. These insulation features enable the proposed driver to work on high frequencies as a high-side transistor of H-bridges as same as in other power converter topologies with a high frequency and high voltage stress of the insulation border. The proposed driver also provides the possibility of tripping the signal, when the short circuit of the controlled power transistor occurs.
Performance Analysis of the Slip Power Recovery Induction Motor Drive System Under Unbalance Supply Voltages
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Ameen, Hilmi Fadhi; Aula, Fadhil Toufick
This paper develops a mathematical model for analyzing the steady-state performance of the Slip Power Recovery Induction Motor Drive System (SPRIMDS) which operates under unbalance supply voltage conditions. The IEC definition indices of Voltage Unbalance Factor (VUF) and Complex Voltage Unbalance Factor (CVUF) which consist of magnitude and phase angle of the unbalance supply are used for the analysis. Also, this paper evaluates the impact of voltage unbalance and firing angle of the inverter on the stator and rotor motor parameters, motor currents, copper losses, efficiency, power factor, torque-speed characteristics, prediction of peak currents of the stator and rotor phase windings, and Total Harmonic Distortion (THD) of stator and rotor currents. The proposed mathematical model of SPRIMDS is validated using MATLAB-Simulink. The results have shown that the performance of the SPRIMDS and variation of motor currents, efficiency, THD and torque are depending on the magnitude of the voltage unbalance and inverter's firing angle.
The Validation of Various Technological Factors Impact on the Electron Beam Lithography Process
(Vysoká škola báňská - Technická univerzita Ostrava, 2021) Zawadzka, Agnieszka; Indykiewic, Kornelia; Paszkiewicz, Regina
One of the most significant processes in micro- and nanoelectronics technology is Electron Beam Lithography (EBL). This technique maintains a leading role in extremely high-resolution structures fabrication process with micro- and nanometer dimensions down to dozens of nanometers. The EBL is a highly complex process and determining fundamental technological factors that affect the final pattern shape is crucial. One of them is the used lithography system, consisting of a substrate and a polymer layer that affects the electron scattering effects. To obtain the required pattern geometry, it is also necessary to properly select the electron beam parameters for given materials. The aim of this work is to discuss the differences in the exposition process for various accelerating voltage (EHT) values. Additionally, the investigation of geometry features and the impact of the exposure dose and the structure dimensions on the final absorbed energy distribution profile in the resist layer is presented and discussed. Numerical studies, using CASINO software and Monte Carlo method, are presented to compare the energy distribution in the polymer that affects the structure formation in the resist layer.

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