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dc.contributor.authorTripathi, Priyans
dc.contributor.authorYadava, Narendra
dc.contributor.authorGupta, Mangal Deep
dc.contributor.authorChauhan, Rajeev Kumar
dc.date.accessioned2022-04-12T08:56:55Z
dc.date.available2022-04-12T08:56:55Z
dc.date.issued2022
dc.identifier.citationAdvances in electrical and electronic engineering. 2022, vol. 20, no. 1, p. 73 - 85 : ill.cs
dc.identifier.issn1336-1376
dc.identifier.issn1804-3119
dc.identifier.urihttp://hdl.handle.net/10084/146033
dc.description.abstractThe choice of gate metal technology for junctionless transistors needs to have diverse charac- teristics as metals have distinct work functions and hence, they show incompatibility while tailoring thresh- old of the device. In such a scenario, bimetallic stacked gate can be a promising candidate to present wide range of tunable work functions required for nano- regime junctionless transistors. This paper explores the electronic phenomena occurring at metal-metal inter- face and the impact of Platinum (Pt)/Titanium (Ti) bimetallic stacked gate-based work function tunabil- ity on the RF and thermal performances of p-type window-based Silicon on Insulator Junctionless Tran- sistor (SOI JLT) using numerical simulator SILVACO ATLAS. The parameters considered for performance evaluation are ON-state current (ION ), OFF-state cur- rent (IOF F ), ION /IOF F ratio, transconductance (gm), cutoff frequency (fT ), Transconductance Frequency Product (TFP), Intrinsic Gate Delay (IGD), intrin- sic gain (AV ), and Global Device Temperature (GDT). The gm, fT , TFP, AV and GDT improve for modi- fied over conventional in the ON state at higher work function, while IGD improves at lower work function. The improvements of 11.7 % and 2.21 % are obtained in maximum gm and fT , respectively, for modified tran- sistor over conventional. The findings suggest that bimetallic stacked gate modified SOIJLT is a better op- tion than conventional for low-power RF application.cs
dc.language.isoencs
dc.publisherVysoká škola báňská - Technická univerzita Ostravacs
dc.relation.ispartofseriesAdvances in electrical and electronic engineeringcs
dc.relation.urihttps://doi.org/10.15598/aeee.v20i1.4258cs
dc.rights© Vysoká škola báňská - Technická univerzita Ostrava
dc.rightsAttribution-NoDerivatives 4.0 International*
dc.rights.urihttp://creativecommons.org/licenses/by-nd/4.0/*
dc.subjectbimetallic stacked gatecs
dc.subjectjunctionless transistor (JLT)cs
dc.subjectradio frequency (RF)cs
dc.subjectSilicon-on- Insulator (SOI)cs
dc.subjectthermal performance and tunable work functioncs
dc.titleImpact of Work Function Tunability on Thermal and RF Performance of P-type Window based Junctionless Transistorcs
dc.typearticlecs
dc.identifier.doi10.15598/aeee.v20i1.4258
dc.rights.accessopenAccesscs
dc.type.versionpublishedVersioncs
dc.type.statusPeer-reviewedcs


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Zobrazit minimální záznam

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