Výukový systém s hradlovým polem pro předmět Číslicová a mikroprocesorová technika I
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Vysoká škola báňská - Technická univerzita Ostrava
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Abstract
The aim of this thesis was to suggest and build a laboratory station with a grate array for the subject of Digital and Microprocesors Technique I. The first part of this thesis focuses on the theoretical presentation of the topic of gate arrays. An analysis of the individual blocks of the laboratory station follows and the last part presents manuals and analyses of laboratory tasks for teaching the subject of Digital and Microprocesors Technique I.
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Import 03/11/2016
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A/D Converter, Counter, D/A Converter, FPGA, Combinational Logic Circuits, Sequential Logic Circuits, Integrated Development Environment.