Výukový systém s hradlovým polem pro předmět Číslicová a mikroprocesorová technika I

Abstract

The aim of this thesis was to suggest and build a laboratory station with a grate array for the subject of Digital and Microprocesors Technique I. The first part of this thesis focuses on the theoretical presentation of the topic of gate arrays. An analysis of the individual blocks of the laboratory station follows and the last part presents manuals and analyses of laboratory tasks for teaching the subject of Digital and Microprocesors Technique I.

Description

Import 03/11/2016

Subject(s)

A/D Converter, Counter, D/A Converter, FPGA, Combinational Logic Circuits, Sequential Logic Circuits, Integrated Development Environment.

Citation